Before the introduction of SandyBridge and AVX instructions, Core2 (Q6600, E8400, etc)and Nehalem processors (i3,i5, i7) made use of SSE instructions (SSE1,2,3,3S,4.1,4.2) to carry out FLOP calculations. SSE is part of
SIMD instructions set which is also used in Cell cpu. So both the desktop CPUs and PS3 Cell broadband processor compute Floating Point operations in similar numbers in a cycle in single-precision and double-precision.
http://en.wikipedia.org/wiki/SIMD#Hardware
SSE has 128-bit wide register.
Single-Precision Floating point numbers are 32-bit wide
Double-Precision Floating point numbers are 64-bit wide
So SSE register can store 4 single-precision floating point numbers and 2 double-precision floating point numbers.
Modern processors with SSE instructions can carry out a mutliplication+addition operation (2 Flop) on a single floating point number per core in a cycle. This is 2 Flop per core in a cycle.
So in Single-Precision: 2 Flop x 4 Floating Point numbers = 8Flop or (4 multiplications + 4 Additions) per core in a cycle
Double-Precision: 2 Flop x 2 Floating Point numbers = 4Flop or (2 multiplications + 2 Additions) per core in a cycle.
However with the introduction of
Sandy Bridge and AVX (Advanced Vector Extensions), the 128-bit SSE register is expanded to 256-bit.
This means you can store eight 32-bit numbers or four 64-bit numbers in the 256-bit register.
So in Single-precision
2 Flop x 8 Floating Point Numbers = 16 Flop or (8 multiplications + 8 additions) per core in a cycle
Double-Precision
2 Flop x 4 Floating point numbers = 8 Flop or (4 multiplications + 4 additions) per core in a cycle.
As Sandybridge is a quad core having 4 physical cores, so this translates into;
Single-Precision: 16Flop x 4 cores = 64Flop per cycle
Double-Precision: 8 Flop x 4 cores = 32Flop per cycle
[email protected] means it can operate 4.7billion cycles in a second. Hence in;
Single-Precision: 64 Flop per cycle x 4.7 billion cycles in a second = 300.8 billion Flops or
300.8GFlops
Double-Precision: 32 Flop per cycle x 4.7 billion cycles in a second = 150.4 billion Flops or
150.4GFlops
In the case of
PS3 Cell [email protected]:
It has 1 PPE (Power Processor Element) and 8 SPEs (Synergistic Processing Elements).
A
PPE can perform can perform 2 Flop in a cycle in double-precision and 8 Flop in a cycle in single-precision.
So that is 8 Flop per cycle x 3.2 billion cycles = 25.6 billion Flops or
25.6GFlops in
single-precision and 2 Flop per cycle x 3.2 billion cycles = 6.4 billion Flops or
6.4GFlops in
double-precision
Each SPE (128-bit wide register) can also perform
25.6GFlops in
single-precision and
12.8GFlops in
double precision
http://en.wikipedia.org/wiki/Cell_(microprocessor)#Architecture
Single-Precision: (1PPE + 7SPE) x 25.6GFLops =
204.8GFlops
Double-Precision 7SPEs x 12.8GFlops = 89.6GFlops
1PPE x 6.4GFlops = 6.4GFlops
Total = 89.6 + 6.4 =
96GFlops
However assuming if PPE is only used to control the SPEs and the 8th SPE is also enabled, then you will end up with 8SPEs x 12.8GFlops =
102.4GFlops in
double-precision.
To make use of AVX instructions, I believ you need to have Windows7 SP1 installed and latest version of Intel Burn test/LinX to take advantage of AVX instructions.
Since I assume you aren't using SP1, then SandyBridge will only be makng use of SSE instructions.
In that case
[email protected] means the maximum theoretical GFlops value you can get in IBT is
75.2GFlops (Double-Precision). Notice this is half of
150.4GFlops with the inclusion of AVX.
You are getting
65GFlops in IBT which is still a very high value and is
65/75.2 = 86.4% of the theoretical maximum.
To get 75.2GFlops:
No of cores x no of Flop per core per cycle x cpu speed = 4 cores x 4 Flop x 4.7Ghz = 75.2GHz
To get 65GFlops:
No of cores x no of Flop per core per cycle x cpu speed = 4 cores x 3.5 Flop x 4.7Ghz = 65GFlops.
However you can't get 3.5Flop and the number will likely be a whole number. Getting 65 GFlops just means that you can't utilise all of the cpu cycles as many of them are also being taken by running of windows, background processes, devce drivers, cached data etc coupled with RAM latencies.
With the inclusion of AVX instructions, you should be getting 65 x 2 = 130GFlops out of a possible 150.4GFlops as discussed above
.
