No, because the time period between the demo and actual real-world launch can be prolonged to three full quarters. Remember the Vega demo at CES 2017?
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AMD Zen 2 (Ryzen 3000) - *** NO COMPETITOR HINTING ***
- Thread starter Jamin280672
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No, because the time period between the demo and actual real-world launch can be prolonged to three full quarters. Remember the Vega demo at CES 2017?
Oh, so Lisa Su saying more information throughout the year and Ryzen coming mid 2019 was a lie? Look, we get it when we get it. If that's June then that's June. If it's later than that then AMD need a slap. But do you really think it's going to be later than June when the 50th anniversary is May 1st?
They'll probably paper launch everything on 1st May, X570 boards also paper launching with a big unveiling at Computex with actual availability 1st week of June.
Associate
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I'm thinking the same. Full product reveal on May 1st, and then launch of R9/7 at Computex, perhaps R5 a few weeks later. The R3s could be launched at either since they'll likely be the defective dies, so there'll be a fairly steady supply of them I think, unless yields are exceptional.
Intel will ride out the storm primarily due to their sheer size, but I think they'll be behind in performance for 2-3 years at least.
Intel will ride out the storm primarily due to their sheer size, but I think they'll be behind in performance for 2-3 years at least.
Nothing new for desktop until 2020, as 10nm Ice Lake (Sunny Cove) if only being released in mobile variants very late in 2019. Obviously if they managed to ramp up volumes faster, and if they a have a need to maybe they will paper launch a new desktop SKU depending on how threatening the AMD CPU's are and if they need a diversionary tactic to hold on the the market share until it can really be released. As for DDR5 on desktop from Inel mid-2021 is the very earliest, alongside PCI-E 5.0 if all their ducks are in a row over a PCI-Sig this year.
This is a really interesting point, also when they are substituting chiplets with over the required available core count. Will they laser them?
Soldato
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If they have an overabundance of usable 8 cores they might. It might need to extremely strange unlocking going on. 14 cores enabled on a 12 core system?
If they have an overabundance of usable 8 cores they might. It might need to extremely strange unlocking going on. 14 cores enabled on a 12 core system?
I had an old Phenom II x 2 550BE and that was based off a failed Quad. I managed to enable core 4 and have a tri-core processor.
I had an old Phenom II x 2 550BE and that was based off a failed Quad. I managed to enable core 4 and have a tri-core processor.
Same here. Had to pump my voltage up and remove the overclock, but I got a stable 3rd core out of the old girl.
Now y'see even the binning that AMD need to do with the chiplets is interesting, because it's not actually so cut and dry as "EPYC gets the better ones". They won't because they can't because there is no "better".
If you get something woeful and only half of it works then chuck it in a quad core Athlon and be done with it, but if you look at how the Ryzen SKUs break down in AdoredTV's leak then it's actually quite complex.
If you have 6 working cores but it's a stinker with power or clocks, then that's going into the basic 3300 or a 6 core APU. But the clocks on the 3300X imply you'd need a reasonable quality on those working 6 cores. Look at the other end, the monster 16 core CPUs are touching and surpassing 5GHz boost. That's 2 fully functioning 8 core chiplets of such good quality they'd actually be wasted on an EPYC or Threadripper.
So it's not so much "lower grade" it's more nuanced in grading chiplets based on criteria: the 8 and 6 core chiplets that are the most power efficient will be for EPYC, the 8 core chiplets that can clock the highest will be for the Ryzen 9s and 3600X, similarly the 6 cores that can clock well will be for the Ryzen 7s and 3600X. Everything else is then considered above average and fills out the other Ryzen 5s and 3s, with the functional but low end stuff palmed off into Athlons and APUs.
Which begs the question what will be done with Threadripper? I think for this very reason we won't get a 64 core Threadripper 3 because that will require 8 8 core chiplets that will eat into the other products. 3990WX (or whatever, you get the idea) will be 48c/96t, but they're not going to be the "best" silicon by any metric.
Soldato
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If the yields are as high as I others have estimated then 8x8 won't be an issue. At an estimate of around 76mm squared then there will be a total of just over 800 die on a 300mm wafter with an expected usable yield of about 95%. Say 70% are 8 cores usable at different speeds then that means one wafer would bring around 560 usable dies per wafer.
Of course this is all educated guessing but I don't see any reason it should be THAT far off.
Of course this is all educated guessing but I don't see any reason it should be THAT far off.
For every top-end EPYC you need 8 fully functioning low voltage chiplets. For every Ryzen 9 you need 2 fully functioning highly clockable chiplets. For every 3600X you need 1 fully functioning very clockable chiplet. And arguably if you have a fully functioning chiplet that is both highly clockable and low (ish) voltage then that's going in the anniversary 3850X, because that particular SKU as leaked will need godlike silicon.
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AMD need that as their marketing slogan if the anniversary sku is real.
EVGA would like a word with you
@LePhuronn Agreed on the nuance I was just keeping a long post shorter. You're dead right on the binning.
Lets not forget TSMC is on schedule for 5nm mass production in Q1-2 2020 the latest
(test production starts in April this year)Here's a thought: the CES demo was a single chiplet 8-0 configuration. If, as expected, AMD also introduce double chiplet versions, does that mean 8 core variants will be 8-0 in final silicon, or will they be 4-4? It seems like the choice would depend on yields. If they have numerous chiplets with <6 usable cores then 4-4 would allow them to use more of those defective dies. However, if that isn't the case then they might stick with 8-0 for simplicity: it would mean a potential 8 core APU would simply mean swapping out a dead/dummy chiplet for a GPU chiplet.
Also, if they do end up with 4-4 (or even 3-3 for the 6 core variants and 2-2 for the 4 core Athlons), will it affect overall performance compared to the 8-0 demo we saw? The answer probably lies in what improvements they've made to infinity fabric but I suspect it would take a small performance hit.
Also, if they do end up with 4-4 (or even 3-3 for the 6 core variants and 2-2 for the 4 core Athlons), will it affect overall performance compared to the 8-0 demo we saw? The answer probably lies in what improvements they've made to infinity fabric but I suspect it would take a small performance hit.
Lisa already confirmed the Ryzen 3xxx package doesn't support a GPU module in the 2nd CCX position. I'd assume a different substrate package would be required for that, which certainly isn't out of the question with the chiplet design.